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德州仪器KeyStone Architecture用户手册编程手册英文版免费下载
部分目录或截图为：
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KeyStoneArchitecture
MulticoreNavigator
User'sGuide
Preface............................................................
1 Introduction............................................
1.1 Terminology Used in This Document .........
1.2 KeyStone I Features ............................
1.3 KeyStone I Functional Block Diagram........
1.4 KeyStone II Changes to QMSS ...............
1.5 KeyStone II QMSS Modes of Use ............
1.5.1 Shared Mode............................
1.5.2 Split Mode ...............................
1.6 Overview..........................................
1.7 Queue Manager .................................
1.8 Packet DMA (PKTDMA) ........................
1.9 Navigator Cloud .................................
1.10 Virtualization .....................................
1.11 ARM-DSP Shared Use .........................
1.12 PDSP Firmware .................................
2 Operational Concepts ..............................
2.1 Packets ...........................................
2.2 Queues ...........................................
2.2.1 Packet Queuing.........................
2.2.2 Packet De-queuing.....................
2.2.3 Queue Proxy ............................
2.3 Queue Types.....................................
2.3.1 Transmit Queues .......................
2.3.2 Transmit Completion Queues.........
2.3.3 Receive Queues........................
2.3.4 Free Descriptor Queues (FDQ).......
2.3.4.1 Host Packet Free Descriptors ..
2.3.4.2 Monolithic Free Descriptors.....
2.3.5 Queue Pend Queues ..................
2.4 Descriptors .......................................
2.4.1 Host Packet .............................
2.4.2 Host Buffer ..............................
2.4.3 Monolithic Packet.......................
2.5 Packet DMA......................................
2.5.1 Channels ................................
2.5.2 RX Flows ................................
2.6 Packet Transmission Overview................
2.7 Packet Reception Overview....................
2.8 ARM Endianess .................................
3 Descriptor Layouts ..................................
3.1 Host Packet Descriptor .........................
3.2 Host Buffer Descriptor ..........................
3.3 Monolithic Descriptor............................
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