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德州仪器RM41Lx用户手册编程手册英文版免费下载
部分目录或截图为：
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RM41Lx16/32-BitRISCFlashMicrocontroller
TechnicalReferenceManual
Preface............................................................................................
1 Introduction............................................................................
1.1 Designed for Safety Applications.............................................
1.2 Family Description..............................................................
1.3 Endianism Considerations ....................................................
1.3.1 Little Endian (LE) ......................................................
2 Architecture ...........................................................................
2.1 Introduction .....................................................................
2.1.1 Architecture Block Diagram .........................................
2.1.2 Definitions of Terms ..................................................
2.1.3 Bus Master / Slave Access Privileges .............................
2.2 Memory Organization .........................................................
2.2.1 Memory Map Overview ..............................................
2.2.2 Memory Map Table ...................................................
2.2.3 Flash on Microcontrollers ............................................
2.2.4 On-Chip SRAM .......................................................
2.3 Exceptions.......................................................................
2.3.1 Resets ..................................................................
2.3.2 Aborts ..................................................................
2.3.3 System Software Interrupts .........................................
2.4 Clocks............................................................................
2.4.1 Clock Sources .........................................................
2.4.2 Clock Domains ........................................................
2.4.3 Low-Power Modes ....................................................
2.4.4 Clock Test Mode ......................................................
2.4.5 Safety Considerations for Clocks ...................................
2.5 System and Peripheral Control Registers ..................................
2.5.1 Primary System Control Registers (SYS) .........................
2.5.2 Secondary System Control Registers (SYS2) .....................
2.5.3 Peripheral Central Resource (PCR) Control Registers ..........
3 I/O Multiplexing and Control Module (IOMM) ..............................
3.1 Overview ........................................................................
3.2 Main Features of I/O Multiplexing Module (IOMM) ........................
3.3 Control of Multiplexed Functions .............................................
3.3.1 Control of Multiplexed Outputs ......................................
3.3.2 Inputs ...................................................................
3.3.3 Control of Special Multiplexed Options ............................
3.4 Safety Features ................................................................
3.4.1 Locking Mechanism for Memory-Mapped Registers .............
3.4.2 Master ID Check ......................................................
3.4.3 Error Conditions .......................................................
3.5 IOMM Registers.................................................................
3.5.1 REVISION_REG: Revision Register ...............................
3.5.2 BOOT_REG: Boot Mode Register ..................................
3.5.3 KICK_REG0: Kicker Register 0 .....................................
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